Lightwave Logic, Inc. (NASDAQ:LWLG) Q4 2025 Earnings Call Transcript

Lightwave Logic, Inc. (NASDAQ:LWLG) Q4 2025 Earnings Call Transcript March 5, 2026

Operator: Greetings, and welcome to the Lightwave Logic’s Q4 and Full Year 2025 Financial Results and Business Update Call. [Operator Instructions] Please note, this conference is being recorded. I will now turn the conference over to your host, Ryan Coleman with Investor Relations. Please go ahead.

Ryan Coleman: Thank you, operator, and good morning, everyone. Thanks for joining us today for Lightwave Logic’s Fourth Quarter and Full Year Financial Results and Business Update Call. I’m joined on today’s call by Lightwave Logic’s President and Chief Executive Officer, Yves LeMaitre. Please note that this call is in listen-only mode for the duration of the call, and that a replay will be posted to the company’s website shortly after the call concludes. Some of the matters we’ll discuss on this call, including statements and our business outlook, are forward-looking, and as such, this call speaks only as of today, March 5, 2026. Such statements may be considered forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995.

A photograph of a technician using a microscope to examine a photonic device.

The matters discussed on this call are subject to known and unknown risks and uncertainties, and these risks and uncertainties could cause actual operating results to differ materially from those expressed in the call. A more detailed description of the risks our company faces is more fully described by the company under the caption Risk Factors included in our most recent Form 10-K and 10-Q. As always, Lightwave Logic assumes no obligation to update the information presented on this conference call. And lastly, you are cautioned that any time-sensitive information may no longer be accurate at the time of replay listening or transcript reading. So with that, I’ll turn the call over to Yves.

Yves LeMaitre: Thank you, Ryan. Good morning, everyone. Thank you for joining us. Let me start with a note of appreciation to our shareholders. Thank you for your continued confidence and long-term commitment. We are building something transformative that requires patience and conviction. To our employees and partners, 2025 was a year of real execution. The progress we made in material science, reliability engineering, foundry integration and customer advancement reflects extraordinary discipline and focus. We are building the company in the right way. 2025 was not a promotional and marketing year. It was an execution year. We moved aggressively from research validation towards structure commercialization. Our Perkinamine electro-optic polymer platform continued to demonstrate high-speed bandwidth, low drive voltage, compact device footprint and compatibility with the silicon photonics and semiconductor ecosystem.

The importance of this last point is often underestimated. Our belief is that tomorrow’s winning photonic technologies for AI networking must fully integrate within the semiconductor foundry, packaging and testing infrastructure. So we strengthened our reliability data sets, most notably around the challenges faced by previous generation of polymers, primarily temperature stability and photo-oxidation. We advanced our back-end of line process integration with novel solutions for electro-optic polymer deposition and encapsulation that are fully aligned with the semiconductor fab infrastructure, tools and processes. We deepened our engagement with foundry ecosystem with multiple committed programs by major foundries to add or improve their PDK related to front-end silicon photonics chip design and manufacturing.

Q&A Session

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This was especially important for Lightwave Logic to enable new customer design wins for customers who have already selected their preferred foundry. Our design win cycle matured meaningfully. We have now 3 programs advanced to Stage 3, prototype to final product in 2025, and we recently added a fourth Fortune Global 500 customer to that list in 2026. Approximately 15 additional engagements are progressing through Stage 1 and Stage 2, and we are hopeful that some of our recent success with new foundries will help accelerate the transition to Stage 3. We are not trying to [ invent ] a market. We are well positioned inside the market that is scaling rapidly. But before we dive into an update of our customer engagements and the market, I’d like to briefly review our select financial results.

Now for the full year 2025, revenue was approximately $237,000, primarily from licensing and nonrecurring engineering compared to $96,000 in 2024. Net loss was approximately $20.3 million or a loss of $0.16 per share, an improvement from $22.5 million or a loss of $0.19 per share in 2024. Our R&D investment was approximately $11.5 million compared to $16.8 million in the prior year, and our G&A expense was approximately $9.5 million compared to $6.4 million in the prior year. In December of 2025, we completed a public offering, raising approximately $32.8 million in net proceeds through the issuance of 11.6 million shares of common stock. The transaction strengthens our balance sheet and contributed to our year-end cash position of approximately $69 million, roughly double the $34.9 million we had at the end of third quarter.

In January of 2026, we exercised the over-allotment portion of the offering, adding another $4.9 million in cash. So based on our operating plan, we believe we are funded beyond December of 2027. We are managing capital deliberately. Every dollar is allocated towards commercialization readiness. Now let’s move to the customers. The customers’ programs deepened in 2025. Stage 3 engagements currently involve primarily wafer level tape-outs, followed by chip processing and testing with possibly iterative design optimization. This is where real technical programs conversion into commercial agreements begins. We are supporting customers inside foundry environments, not just in isolated R&D settings. Regarding specific customer updates, one of our Tier 1 customers is focused initially on 1.6 terabit per second transceivers operating at 200G per lane.

In January, we launched a full wafer tape-out with them at a new silicon photonics foundry and expect chips to come back in Q2 2026 for processing and testing. Another Tier 1 customer is seeking a next-generation material suitable for CPO packaging that can operate at higher temperature to enable new packaging processes. We launched this program in 2025, and it is a key priority for our chemistry design team in 2026. In parallel, we’re also planning a foundry run over the next few months with that customer to validate the custom modulator chip design required for CPO. Our third and most recently announced Tier 1 customer will design and build silicon photonic chips with embedded modulators at a state-of-the-art silicon photonics foundry, where it will be the first implementation of EO polymer modulators.

Finally, our long-time customer and partner, Polariton continues their steady path to bringing Plasmonics to commercialization. Plasmonics is an exciting new technology that has the potential to accelerate the path to 800 gigabits per second modulation. Our focus there is to support their prototyping efforts and device packaging reliability programs. We have made excellent progress in 2025 in terms of customer acquisition, and our goal is to continue that in 2026. As previously disclosed, 2026 revenue is expected to be driven primarily by material supply and NRE activity. Volume production and licensing revenues are not anticipated until 2027 at the earliest. That time line is deliberate. Qualification cycles in this industry are rigorous as they should be, given the performance and reliability requirements of these applications.

We are taking a disciplined approach, working through the necessary validation and integration steps to ensure long-term success. Our focus is on building durable, repeatable revenue streams supported by qualification and design wins, not pursuing short-term or opportunistic revenue. Let’s step back to the industry context. According to LightCounting Research in 2018, the share of silicon photonics in the optical transceiver market was 10%. It jumped to 33% in 2024 and for the first time, is expected to be the dominant technology in 2026. Silicon photonics is winning the integration platform battle for hyperscale and AI networking. Why? Because of CMOS compatibility, including for advanced packaging, because of providing a scalable foundry infrastructure, because it is aligned with the ecosystem, because of the supply chain maturity and the cost efficiency.

Alternative technologies such as [ 35 ] materials or lithium niobate remain relevant, but the ecosystem center of gravity and momentum are clearly with silicon photonics. Our strategy is simple. We enhance silicon photonics. We do not compete against it. Electro-optic polymers allow silicon photonics to reach higher bandwidth with lower power per bit. This is precisely what AI infrastructure requires. As you know, at Lightwave Logic, we operate as a fabless material and IP platform. Scale comes first to foundries for the front-end silicon photonics chip production. Throughout 2025, we worked diligently at expanding the number of foundries that are able to process the modulator structures required for electro-optic polymer reference design. This was a gating factor in enabling customers already committed to certain foundries.

Earlier this week, SilTerra, a pioneer in silicon photonics foundry services, announced the availability of a high-speed modulator platform based on EO polymer through the process design kit, or PDK, from Luceda Photonics. SilTerra, Lightwave Logic and Luceda Photonics successfully completed a wafer tape-out earlier in 2026. Device characterization and performance validation are expected in mid-2026. With SilTerra, GlobalFoundries and 2 other unnamed partners, we now have agreement in place with 4 major foundries with wafer runs either underway or scheduled for the first half of 2026. An additional 3 foundries are under consideration, and we intend to onboard them as our process engineering resources become available. Regarding our back-end processes currently performed in Denver, Colorado, we initiated a production ramp-up program in 2025, focused on supporting multiple wafer size and improving yield, cycle time and equipment efficiency.

We are also identifying industrial partners to potentially outsource this portion of the manufacturing process for future high-volume production. This is a result of manufacturing discipline. We are preparing for scalable integration, not boutique deployments. Now let’s talk about the market. According to LightCounting’s January 2026 report, Ethernet optical transceivers of 100G and above and CPO reached approximately $16.5 billion in revenue in 2025. The market is projected to reach approximately $26 billion in 2026. This corresponds to a 60% growth rate for both ’25 and ’26. AI clusters are expected to consume roughly 80% of Ethernet transceivers and CPO through 2031. This is not incremental growth. This is a structural shift in terms of infrastructure expansion.

The speed road map is also accelerating. 1.6 terabit per second transceivers revenue are expected to reach USD 1 billion in 2026 and 3.2 terabits per second optics volume production will begin in 2028. CPO or co-packaged optics is also moving into early deployment. NVIDIA has announced its first CPO products last year with InfiniBand products entering the market in the first half of 2026 and Ethernet in the second half of 2026. Vendors are now targeting approximately 5 picojoules per bit at 200G per lane. Power efficiency is becoming the gating constraint. Shrinking size is now critical, in particular for CPO. The ability to easily incorporate photonics materials into semiconductor packages is a must. This is exactly where polymer-enabled modulation matters.

Growth might moderate beyond ’26 and ’27, but the base level of optical demand remains structurally higher than pre-AI cycle. This is a multiyear expansion. As a result, our Perkinamine polymer ramp strategy is disciplined. 2026 focuses on expanded qualification test, material supply scaling, yield and performance improvement, materials characterization data set expansion. If design wins conversion to production occurs, 2027 would represent the earliest meaningful volume phase. So to prepare, we are scaling polymer synthesis capacity, strengthening our process controls, enhancing our supply chain readiness and refining our production economics. We are preparing for scale responsibly. Technology alone does not create durable companies, operational discipline does.

So in 2025, we maintain effective internal controls, we strengthened our IP protection, we built deeper systems integration expertise. We are building the company infrastructure required to support long-term licensing and material supply at scale. Our 2026 priorities are clear: number one, advance Stage 3 programs towards qualification milestones and Stage 4; number two, convert technical engagements into structured commercial agreements; number three, broaden and strengthen the electro-optic polymer-ready silicon foundry ecosystem; number four, continue performance optimization at 200G, 400G per lane and beyond; number five, prepare operationally for a 2027 production ramp transition. Execution, conversion, scale readiness. AI infrastructure is not slowing.

Bandwidth requirements are not slowing. Power constraints are tightening. Silicon photonics is scaling and it needs better modulators. This is where Lightwave Logic fits. 2025 strengthened our foundation, 2026 is about disciplined execution. We remain confident in the AI opportunity before us and committed to building long-term shareholder value. Let me turn the call back to Ryan to moderate our Q&A session.

Ryan Coleman: Thanks, Yves. When we announced this call, we invited investors to submit their questions ahead of time. We’d like to thank those investors who took the time to do so, and we appreciate your continued engagement on these calls. Our first question is, company presentations for nearly the past 12 months have indicated that the back end of line process is ready for transfer to a foundry. What specific milestones remain to complete the technology transfer and is transfer dependent on PIC completion with Stage 3 partners and progression to Stage 4? Also, has Lightwave Logic achieved acceptable yields with its wafer scale pulling and encapsulation of modulators?

Yves LeMaitre: Yes. Thanks, Ryan. Good question. As I indicated earlier, we intend to proceed with our back end of line process and capacity expansion in Denver to support prototyping and final product qualification. We’re also continuing process development in Denver to match the semiconductor industry road map, including migration to, for instance, large or larger wafer sizes. In parallel, we intend in 2026 to bring 1 or 2 external foundry partners to bring high-volume manufacturing scale to our back-end of line process.

Ryan Coleman: And our second question, are you able to provide guidance on production volume requirements for 2026? And can you comfortably meet that requirement?

Yves LeMaitre: Yes, we are planning for success. So we have made aggressive assumptions related to our ability to win share in 2027 and 2028 in order to determine the volume production of Perkinamine as well as the floor capacity, the number of technicians and the production equipment that will be required at our facility in Englewood, Colorado, close to Denver. My experience in the AI data center market shows that immediately after closing a design win, the ability to ramp-up production is so critical. So you do not want to be caught flat-footed when the time comes for a significant increase of polymer production. We have a good model of yield capacity and equipment required to achieve our production target in 2027.

Ryan Coleman: And our next question, can shareholders expect to see an EOP modulator-based pluggable transceiver prototype completed this year?

Yves LeMaitre: Well, obviously, our customers are working diligently at bringing silicon photonics PICs to the market in the form of photonics engines for transceivers or CPO. We participate to these programs of suppliers of materials and PDK, but we do not control the full transceiver program. So we will continue to update you on our progress towards Stage 4 throughout 2026.

Ryan Coleman: And regarding the products we are working on with Tier 1 partners, when a product is finalized or rolled out, do we expect to see joint press releases? Or how can shareholders expect to be updated regarding their progression?

Yves LeMaitre: Well, as we did hopefully today, I mean, we will provide visibility to our shareholders on our progress through quarterly financial and business update calls like the one today. Now when it comes to endorsement of Lightwave Logic by customers, it is in the hand of our customers, and they will decide if and when to issue press release or public announcement.

Ryan Coleman: And our last question, regarding the SilTerra announcement, what specific performance metrics will be validated for the mid-2026 device characterization? Were there any limitations or yield constraints identified during the early 2026 tape-out? And can you talk about the announcement and how it fits into your broader foundry strategy?

Yves LeMaitre: Yes. Thanks for that question. I mean this tape-out is a really important milestone that will validate both a number of key design and performance parameters for 200G and 400G modulators, but it will also confirm or help confirm optimal foundry process and equipment capabilities. And most of the test results for this specific tape-out at SilTerra are expected by mid-2026.

Ryan Coleman: Thanks, Yves, and thank you again to everyone who sent questions. I’d like to turn the call back over to our operator to conclude this conference call.

Operator: Thank you. Ladies and gentlemen, thank you for your participation. This does conclude today’s teleconference. You may disconnect your lines, and have a wonderful day.

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