Atomera Incorporated (NASDAQ:ATOM) Q1 2026 Earnings Call Transcript

Atomera Incorporated (NASDAQ:ATOM) Q1 2026 Earnings Call Transcript May 5, 2026

Atomera Incorporated misses on earnings expectations. Reported EPS is $-0.17 EPS, expectations were $-0.1326.

Mike Bishop: Hello, everyone, and welcome to Atomera’s First Quarter 2026 Update Call. I’d like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera’s IR website for 1 year. I’m Mike Bishop with the company’s Investor Relations. As in prior quarters, we are using Zoom, and we will follow a similar format. [Operator Instructions] We will open with prepared remarks from Scott Bibaud, Atomera’s President and CEO; and Frank Laurencio, Atomera’s CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website. Before we begin, I would like to remind everyone that during today’s call, we will make forward-looking statements.

These forward-looking statements, whether in prepared remarks or during the Q&A session, are subject to inherent risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors section of our filings with the Securities and Exchange Commission, specifically in the company’s annual report on Form 10-K filed with the SEC on February 24, 2026. Except as otherwise required by federal securities laws, Atomera disclaims any obligation to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances. Also, please note that during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G.

Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today’s press release, which is posted on our website. Now with that, I’d like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Scott Bibaud: Thanks, Mike, and good afternoon, everyone. This quarter, we made solid progress with multiple customers across our highest value markets while also expanding the breadth of applications where MST can solve real current pain points for the semiconductor industry. We’re seeing strong customer pull in advanced logic, memory and wide band gap materials like GaN and power and in RF, areas that are being shaped by the rapid growth of AI infrastructure, which is driving the need for better power efficiency, signal integrity and system performance. Today, I’ll start with an update on gate-all-around, where we’ve been working closely with customers and our strategic partners to validate MST in these advanced geometries.

Then I’ll touch on our customer pipeline and close with updates on GaN, giving insights on some exciting new technical results that are shaping near-term opportunities. As we said before, the move to gate-all-around at 2 nanometers and beyond is one of the most important architectural transitions in the industry, and it’s also one of the most difficult manufacturing environments since fabs must build incredibly complicated structures at line widths of 5,000x smaller than a human hair, where a small amount of atomic migration can cause big problems. Gate-all-around transistors are the building blocks for AI infrastructure and dopant diffusion control is critical to their effectiveness in terms of performance and reliability. Therefore, the industry is demanding clear proof that any new material can be deposited precisely and that it delivers measurable benefits in advanced silicon devices.

Q&A Session

Today, there are 4 companies in the world developing gate-all-around transistors, TSMC, Samsung, Intel and Rapidus. We know that each of them can use the capabilities of MST, so it’s our goal to achieve adoption at all 4. Further, as these companies transition to the generation beyond gate-all-around called CFET, our technology becomes even more essential. So working with us now is in their best interest long term. In our last earnings call, we have just received measured silicon results that prove MST is the best solution for a critical source strain liner application in these small geometry transistors. At this point, we’re actively working on evaluations of our technology with 2 of our target gate-all-around customers and discussions are underway with the others.

It is typical that a customer asked to conduct multiple demonstrations before agreeing to accept a new technology for implementation in their fab wafer flow. These demonstrations help to validate our claims while simultaneously addressing the detailed implementation and functionality questions these customers are focused on solving. We also expanded the scope of our work with our strategic development partner this quarter, which is important because it strengthens both our technical velocity and our credibility with the ecosystem. Their test and development infrastructure helps us generate the kind of data that advanced node customers insist on seeing before engaging and their endorsement will certainly help us engage a broader set of teams within each target account.

Each of the large memory manufacturers are facing similar challenges to the gate-all-around customers as they develop their next-generation transistors in DRAMs and high-bandwidth memories. Our team is in discussions with them right now, and we are currently working on multiple solutions using MST to assist in this area. Right now, memory manufacturers would do almost anything to get greater fab capacity, and they have the resources to evaluate different methods of doing so. We hope to take advantage of that opportunity with solutions enabled by MST. The momentum we’re seeing in the advanced node transistor space is a result of many years of work targeting current market trends. The macro challenges that AI success has put front and center, capacity and performance of CPUs, GPUs, logic and memory, the power demands of cloud providers and the increased costs associated with these are all areas that Atomera can help solve.

For that reason, we believe that MST is a fundamental tool for the future of AI. Our customer pipeline remains very active across multiple domains. For example, our work with our large IDM customer continues to go well, and we expect additional results from wafer runs soon. Our efforts with ST Microelectronics are bearing fruit, and we are confident we will reengage with them again in the near future, consistent with our view that MST can create value across multiple product lines, especially in a large diversified IDM or foundry. In RF SOI, we are seeing strong results confirming our extensive TCAD simulations. The technical results we’ve been focused on, including for both power switch and LNA have been confirmed through customer silicon runs.

The near-term question is less about performance and more about the most efficient path to commercialization, particularly in cases involving fabless licensees where aligning the business structure with the manufacturing flow can be complex. In power devices, we’re seeing excellent potential in new development work being done to target MST at both TrenchFET and HVT transistors, useful in high-frequency, high-speed and high-voltage applications. At the same time, wafers continue moving forward with our second JDA partner, and we’ll keep pushing those efforts toward production pathway. Turning to GaN. We made meaningful advancements this quarter, including a breakthrough that could give us a technical leadership in RF GaN on silicon to augment the advantages previously outlined for power GaN on silicon.

To explain the innovation, I need to give a little background. GaN on silicon is a much more economical growth method than alternatives built on exotic substrates like silicon carbide or sapphire. But when GaN on silicon is manufactured due to the GaN stack growth process, gallium and aluminum ions gather at the silicon substrate interface, forming an unwanted sheet charge layer called a parasitic channel, which is well known to limit RF performance and GaN on silicon applications. In fact, its elimination has been the subject of materials and growth studies for more than 20 years. In the past few weeks, we received preliminary performance data suggesting MST can dramatically reduce the parasitic channel. It does this by using MST’s fundamental interface engineering to block the gallium and aluminum ions from getting into the silicon substrate.

An industry veteran told us that in his 20 years, this is the best measured sheet charge data he has ever seen. We’re continuing to validate this very promising discovery with our test and measurement partners. RF GaN on silicon is a value in the wireless infrastructure, military, defense and satellite markets. It’s also being actively evaluated for high integrated RF front ends such as those for 6G cellular. So the market potential is large and growing fast. We are actively engaging on both 200-millimeter and 300-millimeter wafer sizes in GaN depending on our customers’ requests. That matters because the wafer size for GaN on silicon is one of its key advantages leading directly to a customer’s path to high-volume production, low-cost structure and a set of fabs that can support ramp, including opening doors for new applications with conventional silicon fabrication methods and devices.

We’re seeing expanded interest in partnerships across the ecosystem, including engagements involving Incize, Synopsys, Texas State University, Sandia and others. Those kinds of parallel tasks, commercial customers plus research and ecosystem partners can compress development cycles and accelerate the time from promising materials data to something customers can qualify and deploy. Work here is aimed at generating data that is both technically rigorous and directly translatable to customer device requirements. Finally, a quick note on our announcement last week about expanding our collaboration with Synopsys. We’ve worked with Synopsys for years to enable accurate modeling of MST inside the Sentaurus TCAD environment through our MST CAD tool set.

This expanded collaboration extends that relationship into GaN workflows for both high-value RF and power devices. Practically, this means we’re working closely with Synopsys to provide feedback on their GaN models, and we’ll be jointly developing marketing materials so customers and partners can evaluate the physical and electrical effects of MST and GaN more quickly and with higher confidence. To summarize, we’re making progress where it matters, expanding and deepening gate-all-around engagements, broadening GaN from power into RF with concrete technical innovations and continuing to advance multiple customer programs across our pipeline. We remain focused on converting technical validation into commercial structures that can drive repeatable revenue and are confident in our ability to do so.

This is indeed an exciting time for Atomera. With that, I’ll turn the call over to Frank, our CFO, to review our financials.

Francis Laurencio: Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the first quarter of 2026, and this slide shows our summary financials. Our GAAP net loss for the first quarter of 2026 was $6.1 million or $0.17 per share compared to a net loss of $5.2 million, which was also $0.17 a share in Q1 of 2025. On a non-GAAP basis, net loss last quarter was $4.9 million or $0.14 a share. And our Q1 2025 net loss was $4.4 million or $0.15 a share. GAAP operating expenses were $6.2 million in Q1 of 2026, which was an increase of $742,000 from $5.5 million of GAAP operating expense in Q1 2025. Stock compensation expense, which is excluded from non-GAAP results, increased by $397,000, primarily due to new hires and our adoption in Q1 of 2025 of performance stock units, or PSUs, for executives.

PSUs vest over 3 years, whereas the time-based options and RSUs that we had previously granted to executives vested over 4 years. Although the vesting period is shorter, PSUs vest only if our stock performs well relative to the Russell 2000. The first tranche of PSUs issued in Q1 2025 lapsed without vesting because we did not hit the required stock price performance threshold. With the exception of stock compensation expense, the drivers of GAAP and non-GAAP expenses are substantially the same. So I will drill down into other factors that impacted our expenses by focusing on non-GAAP numbers. Please refer to the slide presentation for a reconciliation between GAAP and non-GAAP results. Non-GAAP operating expenses in the first quarter were $4.8 million, a year-over-year increase of $348,000 from $4.4 million in Q1 2025.

Sales and marketing expense increased by $203,000, reflecting our 2 executive hires since October. R&D expenses increased by $127,000 from $2.8 million in Q1 of last year to $2.9 million in the first quarter of this year, primarily due to higher spending on outsourced engineering to support the wafer runs for our gate-all-around engagements, our IDM customer and our JDA customer, which drives spending on metrology. G&A expenses were basically flat from the first quarter of last year. Turning to sequential quarterly results. First quarter 2026 non-GAAP net loss was $4.9 million or $0.14 a share compared to net loss of $3.3 million or $0.10 a share in Q4 of 2025. Operating expenses were $4.8 million in Q1, which is a $1.6 million increase from $3.2 million in Q4.

Let me offer some color on the magnitude of the sequential increase. As I explained on our last quarterly call, our Compensation Committee elected not to pay the full 2025 executive bonus, withholding approximately $669,000, which normally would have been paid out in January. The committee provided the executive team the opportunity to earn back the withheld amount in 2026 upon achievement of commercial objectives. This led to us reversing accrued bonus expense in the fourth quarter, which skews the comparison of expenses between Q1 and Q4. Our balance of cash, cash equivalents and short-term investments on March 31, 2026, was $41.1 million compared to $19.2 million on December 31, 2025. We used $4.6 million of cash in operating activities during Q1 compared to $3.2 million in Q4 and $4.8 million in Q1 of last year.

As is typical for us, cash used in the first quarter of every year is higher than other quarters due to payments for items that are expensed over the year. In February of this year, we closed on a $25 million registered direct stock offering, selling 5 million shares of common stock at $5 per share, netting us proceeds of $23.6 million after fees and expenses. Prior to this offering, we had also raised $3.2 million in Q1 by selling approximately 1.3 million shares under our ATM at an average price of $2.47. Currently, we have 38.7 million shares outstanding. With the proceeds of our equity offering, we feel that our current cash balance puts us in a strong position to execute on the opportunities ahead of us, but we will continue to be disciplined about controlling our costs.

On our last call, I said that we expected our 2026 annual non-GAAP operating expense to be approximately $18.5 million, and we are holding to that number. To reiterate, the reason why the expense increase appears as large as it does over $15.9 million of OpEx in 2025 is the bonus deferral, which essentially shifted expenses out of Q4 and moved them into 2026. Organic increases in spending mainly relate to the hiring of our VP of Sales in Q4 last year and our VP of Marketing in Q1. Revenue in Q1 was $11,000 and consisted of fees for wafer deliveries to the large IDM that Scott talked about. And we have $96,000 of deferred revenue on our balance sheet. Approximately $46,000 of revenue that we expected to recognize in Q1 pushed out to Q2 because wafer shipments that we anticipating making last quarter pushed out to early this quarter.

Accordingly, we expect Q2 revenue to be in the range of $50,000 to $100,000. With that, I will turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Scott Bibaud: Thanks, Frank. And before we take questions, I want to thank our employees, our customers and our shareholders for their continued support. We’re excited about the progress we’re making, and we remain focused on translating our growing body of simulation and customer silicon evidence into commercial agreements that can drive long-term repeatable revenue and a strong sustainable business. Mike, we will now take questions.

Mike Bishop: [Operator Instructions] And right now, it looks like Richard is ready to ask a first question. Richard, please go ahead.

Richard Shannon: Scott, the gate-all-around stuff here, you made some very interesting comments. I want to touch on a few of these things here. So you mentioned that you’ve got — now have measured silicon results here and your customers have said that they’re better than the other solutions that they have here. Just want to make sure that that’s what you said, and then I have a couple of follow-ups on that topic.

Scott Bibaud: Yes, you maybe — are you talking about GaN or gate-all-around?

Richard Shannon: Gate-all-around.

Scott Bibaud: On gate-all-around, we do have measured silicon results. And we evaluated our results against another method that people in the industry are using to accomplish the same type of thing we’re doing, and our results are a significant improvement. So yes, we have definitely had that, and we’re showing that to customers.

Richard Shannon: So to follow up on this, so I assume that the measured results are wafers run at 1 of these 4 targeted customers. Is that correct? Or it’s independent?

Scott Bibaud: In fact the measured results are something that we did in conjunction with our strategic partner, where they had gate-all-around structures, and we use those devices to grow MST on those gate-all-around structures in the wafer, and then we’re able to conduct this testing. So now that’s — if you think about how we approach customers, we go out and we show customers our simulation data, which we can do without a strategic partner. But then having silicon tested data is a massive improvement over that. So that’s been able to really open the doors for us to get into the customers. The next step from there is the customer will typically say, okay, we can see you did that on your strategic partners’ structure. Now we want you to do it on our structure because our structure is different.

Everybody is different. And when I mentioned that we’re — we have work underway with 2 of the target customers there doing demonstrations, that’s the step we’re at where we’re trying to do — implement our technology on their structures and show them that. We believe that the step after that, Richard, will be that they’ll have to install MST in their fabs to do any further testing because these structures are so small and hard to manufacture that it’s difficult to do a lot more work by having us run demonstrations in our fab.

Richard Shannon: Okay. So to that point, do you have a commitment to attempt to do this on your customer structures? Or is just the discussions to get that agreed to?

Scott Bibaud: We’re working on it with 2 of them actually — I don’t know what you mean by commitment, but I guess they’re sending us wafers and we’re putting on. So yes, that’s pretty committed.

Richard Shannon: Okay. That sounds pretty good. So what’s the time frame for this work to get done? And then I assume, given what I’ve heard for the many years that I followed you guys that the analysis of these can often take a while, and these are more complex than most. So I would assume that analysis takes a while. So what’s the kind of the turnaround time between getting that done, analyzing and getting to that next step? What do you foresee that taking?

Scott Bibaud: It’s going to take several months. Just us doing the work, we have to really do a lot of development work to just figure out how to grow things effectively in these tiny devices that they’re sending us. And so normally, when someone sends us wafers within 3 weeks to a month, we can turn those around and send them back. In this case, my guess is it might take us longer than that, 2 to 3 months. And then when we sit in the back, they have to put them in their fab and run them for several months. So it could be in the order of 6 months before we start to see results coming out of this. Now in — I mentioned a few times on the call and both structural analysis, which is where they are looking at what we did for deposition in those structures and making sure that what we did was appropriate, they can do that pretty quickly because you’re taking TEM images like electron microscope images and looking at what we did, that — those results will come quickly, but the electrical results will be the result of running the wafers through the whole line.

Richard Shannon: Got it. Okay. And so you’re expecting or expecting to run wafers with — wafers from 2 different GAA customers then over the next few months?

Scott Bibaud: Yes.

Richard Shannon: Okay. Going back to my first question here and understanding the results you measured with the runs you did with your equipment partner. I want to get a sense of whether the customers agree that the comparisons you’ve done with, I think, an industry standard approach to dopant diffusion, they actually agree with that as well that, that is much better than what they’ve been — what they can get internally? Or is this just what your equipment partners concluded for you?

Scott Bibaud: I think there’s no doubt that the customers that we’ve been able to engage with and get down to lots of details on it, they have been impressed enough that they want to move forward with these further demonstrations. So yes, they definitely saw the benefit of using MST to conduct — to block the dopant diffusion in the areas that we’re talking about and how it works better than what they’re currently implementing.

Richard Shannon: Okay. Okay. Fair enough. Some really interesting stuff going on there. Maybe a couple of other quick questions. So on the DRAM side, it sounds like we made some progress here. But if I’m to compare that with the progress on the logic side to the memory side, it sounds like the logic is reasonably farther ahead than memory. Is that a fair comparison?

Scott Bibaud: Yes, that’s true. We are talking with the memory manufacturers, and they — one thing, memory is quite a different architecture than logic that we’re using gate-all-around. But in memory, they’re having the same type of dopant diffusion problems with their newer architectures as the gate-all-around folks are and our technology is directly applicable to that. So we have a lot of interest in — from the DRAM guys about that. We’re also talking to them about some other solutions that may be able to help them in different ways. So it’s lots of different vectors of how we’re engaged with DRAM guys. I should say with the memory guys because it’s also in high bandwidth memory, not just DRAM. But we’re further ahead with the gate-all-around customers than we are with them.

Richard Shannon: Okay. All right. Fair enough. Maybe a question on the GaN side here. So I think before — my recollection is you’re talking more about applications of GaN into the power space, but more recently, it’s been in RF here. How would you characterize kind of the — which one is kind of the leader in terms of getting to the next step here and getting installation licenses, I know that’s not the right term, but it’s kind of what I think of it, installation licenses or using the wafers with that already built in there, which one is kind of in the lead here if either one is notably better?

Scott Bibaud: Okay. So it’s kind of interesting where you’re right saying that we initially targeted the power market for our GaN on silicon work. The power market is actually much larger than the GaN on RF market today. And that’s one of the reasons why we targeted it first. And for the power market, we — our big value that we’ve been talking about is to improve crystal quality and therefore, to allow people to manufacture on larger wafers because there’d be less ball and warp as they’re growing the GaN and fewer defects and therefore, would have a lot of inherent value. Now the only challenge with that is to validate all that work, you actually have to build wafers and build electrical devices and do a lot of testing. So that takes some time.

And everybody’s GaN growth properties are different. So there’s some tuning that has to happen — and so that takes time. The new things I just mentioned, GaN on RF, we got some test data and we just spoke about it at a big compound semiconductor conference last week, and there is a huge amount of interest in the industry. And just looking at this early data that we got, it has to be validated and so forth. But just looking at that data could be enough for someone to adopt us because it’s such a big breakthrough in such an area where the industry needs solutions. In RF, they don’t actually have to do the full electrical testing before they can decide to move forward on something. So it could be that we’re moving — although we’re earlier into the GaN on silicon for RF market, that one could move faster.

Richard Shannon: Okay. All right. Fair enough. One last question for me. And maybe going back to STMicro here, and I’m not sure if this is the — who you’re now referring to the IDM customer or not here. So maybe correct me if I’m misassuming that here. But maybe just kind of indicate where we’re sitting here with those guys. Obviously, we have put a pause on the power stuff that you’re hoping to move forward with that you talked about late last year. How about the other applications with them? Are they still moving as full force as you had expected and had been seeing since the cessation of the power work with them?

Scott Bibaud: Yes. Just to clarify, when I talk about the IDM, it’s not STMicro. STMicro is another IDM, and we think we have a lot of different areas that we can engage with STMicro, but that’s a separate engagement. So yes, we’ve been talking with multiple business units over there and been doing some work, some evaluation work, and we have recently got some results that lead us to believe that we’re going to start reengaging with them on developing a product. We aren’t at the point where we can talk about that yet, and ST hasn’t specifically given us any okay to talk about it. But yes, we’ve been saying since we had to give that unfortunate news about the BCD program at ST that we are working with other groups and that our relationship with the company was great.

And the thing is they really know and understand MST technology and have seen it and they believe in it. So this is kind of an indication of those comments that we’ve been making and I haven’t been able to announce a new deal with them yet, but we hope to be able to do that in the future.

Mike Bishop: Okay. There are a few questions that have been asked in the Q&A line, and I’ll just bring them up one by one. So the first kind of question is about gate-all-around and it’s that given the evaluation periods that we’ve seen in other areas of Atomera, are there specific milestones that need to be hit to convert these gate-all-around customers into JDA? And what’s a realistic time frame for such a conversion?

Scott Bibaud: Yes. At a high level, I’ll — maybe I’ll put a little bit more structure on what I showed — I talked about Richard before. It’s typical customers who want to see kind of 4 different levels. They want to see TCAD results that show that you have the potential to deliver performance, and they have to understand all the TCAD background and believe in it. Then they’ll move ahead and say, we want to see that captured on silicon. So we’ve done those 2 steps and gate-all-around. The next step, they say, okay, we want to see that captured in silicon, but on our silicon on our structure, we’re going to send you guys wafers. We want you to deposit it on our structure and send it back to us, and we’ll evaluate it. Now they know they’re not going to get the most perfect performance out of that because the work we have to do together and tuning them up and getting everything to work fully integrated.

But they’re just trying to do a proof of concept on their platform, right? That’s the stage we’re at right now with 2 of the customers. Beyond that, the stage after that would be where they install and do the actual implementation on their device, tuning it all appropriately. So yes, it’s a fair question to say when should we expect to see a JDA sometime during — in this period of us doing the evaluation on their devices and when we get to the point we’ll install there because that would involve a license, then we should be having a JDA in place. These companies do not move fast when you’re talking about kind of legal agreements. So — but we’re working hard to make those happen, and we hope to be able to announce them at some point in the near future.

Mike Bishop: Okay. And Frank, the question regarding the equity raise. An investor asked, he is curious about the background and reason for the third-party private placement. And given the stock price rise, was that — could we have had better timing?

Francis Laurencio: Right. Yes, thanks for that. One of the comments I’ve made in talking about the capital that we raised in Q1 was some funding that we got via the ATM. And if you look at that, the average price on that was $2.47, which is roughly about where we were trading about 1.5 weeks or 2 before we did the equity raise. And so the $5 price that we executed on there, given what we had seen so far, not only in Q1, but really looking back over the last couple of years, it made us look at this as a very good opportunity because, sure, the stock had run up to $7. And now in the last couple of weeks, it’s run up again. But given the past trading levels that we had and again, a lot of geopolitical uncertainty in the middle of February, which we’ve kind of seen play out since then.

Of course, you can’t know how the equity market is going to perform. But on balance, it seems like a very good opportunity for us to execute on that. And then frankly, be able to work toward commercial outcomes and not worry about the day-to-day movements in the stock price to have to use the ATM to keep our balance sheet strong. So we’ve now strengthened the balance sheet. It’s always kind of easier with the benefit of hindsight to second guess the price, but I think it was a very good decision to execute then.

Mike Bishop: Question on the tool partner. How has your relationship evolved with your tool partner, the strategic partner? And are they giving you more engineering personnel? And how has that relationship changed over time?

Scott Bibaud: Yes, that’s a good question. We have been — we try to be good partners with each of the big tool vendors. There’s 3 main tool vendors that the industry uses for epi tools. And we typically want to be kind of an arms dealer work with whatever tool our customers want to work with. So we have good relationships with all of them. The tool vendor that we have the strategic partnership with we’ve been working with for more than a decade, and had a good relationship with. But now that we’ve entered into the strategic partnership, the level of co-development work that we’re doing is at a whole new level. So we have weekly meetings with their engineering team where we are working on developing the test data that we need for marketing to customers.

And as customers ask us questions and want to get more demos, and we dig in and do work on that together. So yes, on an engineering cooperation level, it’s at a whole new level. The second area is on the marketing and sales to customers, and that’s something that we’ve never really done with them in the past, and that’s where we would be developing the right materials for us to both go into target customers and talk about MST technology and what a good solution that is. Now one thing I’ve calculated a number of times is that if we are successful licensing our technology to customers, in many cases, the tool vendor is going to make more money from us winning designs there than we will. So there’s obvious advantages for them making us successful.

And so they’re not doing this out of the goodness of their heart. But the good news is, I think they’ve recognized that in the last year since we started this, and we’re really seeing the benefit as we’re engaging with customers.

Mike Bishop: Okay. And this is a follow-up kind of to the when moving of the gate-all-around customer — engagement. But investor asked last — commented that the last call sounded like 2026, we would see several deals being made. Is it safe to say that now that sounds unlikely? Or is there still hope for inking an agreement this year?

Scott Bibaud: We’re only in the fifth month of the year, and I’m hopeful every month that we’re going to be inking deals. So definitely, we’d say there’s definitely a very strong chance.

Mike Bishop: And if you look at all the areas in which you are working, which of the segments do you think is closest to producing a royalty-bearing license?

Scott Bibaud: So I spoke a call or 2 ago about wafer-based products. And I think that the development effort in a wafer-based product is relatively easier. So some of the areas where we’re offering wafer-based solutions are in gallium nitride and in RF SOI. And there’s — we have wafer-based solutions that we’re offering in the memory space. So I think one of those could be the fastest. But we also have been working on power and on RF SOI with customers for a very long time. So those could also be quick time to market. It’s very hard to call with so many moving pieces.

Mike Bishop: All right. And with that, Scott, I’ll turn the call to you for closing comments here.

Scott Bibaud: Okay. Well, I want to just thank you all for joining us to hear the progress being made within Atomera. I hope you’re feeling the excitement that we are. Please continue to look for our news, articles and blog posts, which are available along with investor alerts on our website, atomera.com. Should you have additional questions, please contact Mike Bishop. We’ll be happy to follow up. Thanks again for your support, and we look forward to our next update call.

Mike Bishop: Thank you. This concludes the call.